PCIe Impedance Calculator
PCIe 3.0 | PCIe 4.0 | PCIe 5.0 | PCIe 6.0
Calculate trace width and differential impedance for PCI Express designs. From PCIe 3.0 at 8 GT/s to PCIe 6.0 at 64 GT/s, get the right 85Ω differential pair dimensions for reliable high-speed signaling.
PCIe Specifications
| PCIe Version | Transfer Rate | Bandwidth/Lane | Differential Z |
|---|---|---|---|
| PCIe 3.0 | 8 GT/s | ~1 GB/s/lane | 85Ω ±15% |
| PCIe 4.0 | 16 GT/s | ~2 GB/s/lane | 85Ω ±10% |
| PCIe 5.0 | 32 GT/s | ~4 GB/s/lane | 85Ω ±10% |
| PCIe 6.0 | 64 GT/s | ~8 GB/s/lane | 85Ω ±5% |
PCIe PCB Design Guidelines
85Ω Differential
PCIe specifies 85Ω differential impedance (42.5Ω single-ended). This differs from USB and Ethernet, requiring different trace geometries.
AC Coupling
PCIe uses AC coupling capacitors on TX lines. Capacitors should be placed close to the transmitter with minimal trace length before the cap.
Length Matching
Match TX pair to within 5 mils. Match RX pair to within 5 mils. TX-to-RX matching is less critical due to separate clock recovery.
Typical PCIe Trace Dimensions
4-Layer Board (1.6mm, FR4)
6+ Layer Board (Low-Loss)
* PCIe 4.0+ typically requires low-loss materials for longer traces. Use our calculator with your actual stackup.
Version-Specific Considerations
PCIe 3.0
- • 85Ω differential ±15%
- • Standard FR4 acceptable for short runs
- • 8 GT/s, NRZ encoding
- • Max trace length ~10-12 inches
- • Most common in current designs
PCIe 4.0/5.0/6.0
- • Tighter impedance tolerance (±10% or ±5%)
- • Low-loss materials required
- • Careful via design (back-drilling)
- • Shorter max trace lengths
- • PCIe 6.0 uses PAM4 encoding
Definitions and References
PCI Express is a point-to-point interconnect standard used to move high-speed digital traffic between a host and peripheral devices. A wire harness is an organized bundle of wires, terminals, and protective coverings used to route power or signals between assemblies, while cable assembly refers to a prepared cable or grouped cables that are terminated for a defined interconnect job.
Calculate Your PCIe Trace Dimensions
Use our free impedance calculator to determine exact trace width and spacing for your PCIe design. Enter your stackup parameters for accurate 85Ω differential calculations.
PCIe Design FAQ
Why is PCIe 85Ω instead of 100Ω?
The 85Ω specification was chosen for better signal integrity at high speeds with typical PCB stackups. It is a balance between performance and manufacturability.
Do I need low-loss materials?
For PCIe 3.0 with short traces, FR4 works. PCIe 4.0 and faster designs usually need lower-loss materials for longer channels.
How important are AC coupling capacitors?
They are required on PCIe transmitter lanes and should be placed close to the transmitter with a short, well-controlled interconnect.
What about via design for PCIe?
PCIe 4.0 and above often benefit from back-drilling or shorter via stubs to reduce reflections and insertion loss.
Should I calculate both width and spacing?
Yes. PCIe differential impedance depends on the full geometry, including width, spacing, dielectric height, copper thickness, and reference planes.
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