IPC-2221 / IPC-2152 Compliant
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Interface Standard

PCIe Impedance Calculator

PCIe 3.0 | PCIe 4.0 | PCIe 5.0 | PCIe 6.0

Calculate trace width and differential impedance for PCI Express designs. From PCIe 3.0 at 8 GT/s to PCIe 6.0 at 64 GT/s, get the right 85Ω differential pair dimensions for reliable high-speed signaling.

PCIe Specifications

PCIe VersionTransfer RateBandwidth/LaneDifferential Z
PCIe 3.08 GT/s~1 GB/s/lane85Ω ±15%
PCIe 4.016 GT/s~2 GB/s/lane85Ω ±10%
PCIe 5.032 GT/s~4 GB/s/lane85Ω ±10%
PCIe 6.064 GT/s~8 GB/s/lane85Ω ±5%

PCIe PCB Design Guidelines

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85Ω Differential

PCIe specifies 85Ω differential impedance (42.5Ω single-ended). This differs from USB and Ethernet, requiring different trace geometries.

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AC Coupling

PCIe uses AC coupling capacitors on TX lines. Capacitors should be placed close to the transmitter with minimal trace length before the cap.

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Length Matching

Match TX pair to within 5 mils. Match RX pair to within 5 mils. TX-to-RX matching is less critical due to separate clock recovery.

Typical PCIe Trace Dimensions

4-Layer Board (1.6mm, FR4)

Target Impedance85Ω Diff
Trace Width~5-6 mil
Trace Spacing~5-6 mil
Dielectric Height~8-10 mil

6+ Layer Board (Low-Loss)

Target Impedance85Ω Diff
Trace Width~4-5 mil
Trace Spacing~4-5 mil
MaterialMegtron/IS415

* PCIe 4.0+ typically requires low-loss materials for longer traces. Use our calculator with your actual stackup.

Version-Specific Considerations

PCIe 3.0

  • • 85Ω differential ±15%
  • • Standard FR4 acceptable for short runs
  • • 8 GT/s, NRZ encoding
  • • Max trace length ~10-12 inches
  • • Most common in current designs

PCIe 4.0/5.0/6.0

  • • Tighter impedance tolerance (±10% or ±5%)
  • • Low-loss materials required
  • • Careful via design (back-drilling)
  • • Shorter max trace lengths
  • • PCIe 6.0 uses PAM4 encoding

Calculate Your PCIe Trace Dimensions

Use our free impedance calculator to determine exact trace width and spacing for your PCIe design. Enter your stackup parameters for accurate 85Ω differential calculations.

PCIe Design FAQ

Why is PCIe 85Ω instead of 100Ω?

The 85Ω specification was chosen for better signal integrity at high speeds with typical PCB stackups. It's a balance between performance and manufacturability.

Do I need low-loss materials?

For PCIe 3.0 with short traces, FR4 works. PCIe 4.0+ typically requires low-loss materials (Megtron 6, IS415, etc.) for traces longer than a few inches.

How important are AC coupling caps?

Critical! PCIe requires AC coupling on TX lines. Use high-quality 0201 or 0402 caps placed close to the transmitter, within ½ inch.

What about via design for PCIe?

High-speed PCIe (4.0+) often requires back-drilling to reduce via stubs. This minimizes reflections and improves signal integrity.

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